Following the trend of CSP type of IC design, we are proud of our innovative front side FIB technology developed especially for CSP, which resolves the limitations and bottlenecks of the conventional solution of FIB through the back side of the die that is commonly in use now.

This unique technique enables us to remove Cu-RDL(even thicker than 20um) without contamination, over etching or damage to underlying layers and circuitry. Our front-side FIB technique, also means it is not necessary to thin the die by back side silicon grinding (as done in preparation for backside FIB) since our proprietary method targets the area to be edited from the top of the die.

This also results in better stabilization of electronic characteristics of the chip. The quality and performance gains of the front side method are way above existing backside FIB methods used at most other analytical laboratories. In addition, the higher success rate, lower cost and more reliable performance of this new technology have been well proven by many of our clients

New Front-Side FIB Technology Introduction:

Advantages of New Front-Side FIB Technology on CSP sample